Cambridge Touch Technologies Ltd. (“CTT”), recognised as a 2021 Best Startup
in Cambridge, UK, as well as one of only 22 European companies named to the 2020 EE Times Silicon 100
, is a fast growing and exciting company combining touch, AI, cloud, and edge technologies into its market leading UltraTouch location and force sensing solution. Founded in 2011 as a spin out from the University of Cambridge, and based on the world-renowned Cambridge Science Park, CTT develops and commercialises its patented technology for next generation smart devices and surfaces. Backed by multinational strategic and venture capital investors, and with a strong international team in Asia, Europe and the US, the company is entering an exciting growth stage within our target verticals of consumer electronics, automotive, industrial, and medical markets.
For this role, we are looking for an Analogue/Mixed Signal ASIC Engineer who will be responsible for block-level and chip-level design and verification. You will have ownership from concept to production silicon, including involvement in design specification, architectural development, transistor and top-level design, analogue and mixed-signal simulation, layout, review and sign-off. Your work will have the potential to shape the way CTT’s IP is developing and to bring CTT’s partners’ and customers’ products to market.
As a Senior Analogue/Mixed Signal ASIC Engineer, the key skills and qualities required are:
- Bachelor’s degree in Electronic Engineering (or similar) to at least 2.1 level, or equivalent practical experience
- At least five years of relevant industry experience or equivalent (or at least three years with PhD degree)
- Strong analogue and mixed signal circuits design skills including:
- Analysing system requirements and defining specifications for analogue designs
- Designing, verifying and implementing chip-level circuits and performing simulations using state-of-the-art EDA tools
- Tape-out experience of low-power/low-noise analog building blocks(i.e. bandgap reference, switched capacitor amplifier, etc.)
- Developing mixed-signal models in Verilog AMS and/or real number modelling
- Carrying out noise analysis in CMOS circuits
- Laying out of analogue circuits, either through direct activities or support to layout engineers
- Understanding of digital simulation, synthesis and ASIC implentation
- Developing mixed-signal behavioural models for validation of architectural choices
- Incorporating design for manufacture (DFM) and design for test (DFT)
- Documentation of all design related issues and contributing to datasheets, architectural specifications and development plans.
- Working with external design houses on implementation, simulation, layout and validation
- Supporting silicon validation and debugging
- Contributing to the development of CTT’s intellectual property portfolio
- Exceptional analytical and organisational skills, coupled with attention to detail
- Excellent spoken and written English, with clear communication skills and an understanding of good documentation practices
And some beneficial skills (not essential) may involve:
- Master’s degree or higher in a related field
- At least ten years of relevant work experience
- Experience with piezoelectric devices and/or touch screen technology
- Experience of ADC design
When submitting your application, please use the reference code ATR2022-6.